12 ʻīniha SiC Substrate N ʻAno Nui Nui Nā noi RF hana kiʻekiʻe
Nā palena ʻenehana
12 iniha Silicon Carbide (SiC) Substrate Specification | |||||
Papa | ZeroMPD Production Papa(Z Papa) | Hana maʻamau Papa(P) | Papa Dummy (Ka Papa D) | ||
Anawaena | 3 0 0 mm~1305mm | ||||
mānoanoa | 4H-N | 750μm±15 μm | 750μm±25μm | ||
4H-SI | 750μm±15 μm | 750μm±25μm | |||
Kūlana Wafer | Koi aku: 4.0° i <1120 >±0.5° no 4H-N, Ma ke axis: <0001>±0.5° no 4H-SI | ||||
Micropipe Density | 4H-N | ≤0.4cm-2 | ≤4cm-2 | ≤25cm-2 | |
4H-SI | ≤5cm-2 | ≤10cm-2 | ≤25cm-2 | ||
Kū'ē | 4H-N | 0.015~0.024 Ω·cm | 0.015~0.028 Ω·cm | ||
4H-SI | ≥1E10 Ω·cm | ≥1E5 Ω·cm | |||
Kūlana Pāha mua | {10-10} ±5.0° | ||||
Ka lōʻihi pālahalaha | 4H-N | N/A | |||
4H-SI | Notch | ||||
Hoʻokuʻu Edge | 3 mm | ||||
LTV/TTV/Bow/Warp | ≤5μm/≤15μm/≤35 μm/≤55 μm | ≤5μm/≤15μm/≤35 □ μm/≤55 □ μm | |||
ʻoʻoleʻa | Polani Ra≤1 nm | ||||
CMP Ra≤0.2 nm | Ra≤0.5 nm | ||||
Nā Māwae ʻO Edge Ma ka Māmā ʻO ke Kiʻekiʻe Nā Papa Hex Ma ka Māmā Kiʻekiʻe Nā ʻāpana Polytype Ma ka Māmā Kiʻekiʻe Hoʻokomo ʻia ʻo Carbon Visual ʻO ka ʻili o ka ʻili silikoni e ka māmā ikaika loa | ʻAʻohe ʻĀpana hui ≤0.05% ʻAʻohe ʻĀpana hui ≤0.05% ʻAʻohe | Huina lōʻihi ≤ 20 mm, hoʻokahi lōʻihi≤2 mm ʻĀpana hui ≤0.1% ʻĀpana huila≤3% ʻĀpana hui ≤3% Hoʻohui lōʻihi≤1×wafer anawaena | |||
Nā Kiʻi Kiʻi Ma ka Māmā Kiʻekiʻe | ʻAʻohe ʻae ʻia ≥0.2mm laula a me ka hohonu | 7 ʻae ʻia, ≤1 mm kēlā me kēia | |||
(TSD) Wehewehe ʻia ka wiliwili wiliwili | ≤500 knm-2 | N/A | |||
(BPD) Wehewehe kahua mokulele | ≤1000 knm-2 | N/A | |||
ʻO ka hoʻohaumia ʻana i ka ʻili o ka Silicon e ka māmā ikaika kiʻekiʻe | ʻAʻohe | ||||
Hoʻopili ʻana | ʻO ka pahu wafer nui a i ʻole ka pahu wafer hoʻokahi | ||||
Nā memo: | |||||
1 Pili nā palena hemahema i ka ʻili wafer holoʻokoʻa koe wale nō ka wahi i kāpae ʻia. 2 Pono e nānā ʻia nā ʻōpala ma ka maka Si wale nō. 3 ʻO ka ʻikepili dislocation mai nā wafers i kālai ʻia KOH wale nō. |
Nā mea nui
1. Nui Nui Pōmaikaʻi: ʻO ka 12-inch SiC substrate (12-inch silicon carbide substrate) ke hāʻawi aku i kahi ʻāpana wafer hoʻokahi, e hiki ai ke hoʻonui ʻia nā chips i kēlā me kēia wafer, a laila e hōʻemi ana i nā kumukūʻai hana a hoʻonui i ka hua.
2. Mea Hana Hana Kiʻekiʻe: ʻO ke kūpaʻa wela kiʻekiʻe o ka Silicon carbide a me ka ikaika o ka māla hoʻohaʻahaʻa kiʻekiʻe e hana i ka substrate 12-inch i kūpono no nā noi kiʻekiʻe-voltage a me nā alapine kiʻekiʻe, e like me nā EV inverters a me nā ʻōnaehana wikiwiki.
3. Hoʻoponopono Hoʻoponopono: ʻOiai ke kiʻekiʻe o ka paʻakikī a me ka hoʻoponopono ʻana i nā pilikia o SiC, hiki i ka 12-inch SiC substrate ke hoʻokō i nā hemahema o lalo ma o nā ʻenehana ʻokiʻoki a me ka hoʻoliʻi ʻana, e hoʻomaikaʻi ana i ka hua o ka mīkini.
4. ʻO ka hoʻokele wela kiʻekiʻe: Me ka maikaʻi o ka wela wela ma mua o nā mea i hoʻokumu ʻia i ka silicon, ʻo ka substrate 12-inch e hoʻoponopono pono i ka hoʻopau ʻana i ka wela i nā mea mana kiʻekiʻe, e hoʻolōʻihi i ke ola o nā lako.
Nā noi nui
1. Nā Kaʻa Uila: ʻO ka 12-inch SiC substrate (12-inch silicon carbide substrate) he mea koʻikoʻi o nā ʻōnaehana hoʻokele uila o ka hanauna e hiki mai ana, e hiki ai i nā mea hoʻohuli kiʻekiʻe e hoʻonui i ka laulā a hoʻemi i ka manawa hoʻouka.
2. Nā Kūlana Kūlana 5G: Kākoʻo nā substrate SiC nui nui i nā polokalamu RF kiʻekiʻe, e hoʻokō i nā koi o nā kahua kahua 5G no ka mana kiʻekiʻe a me ka pohō haʻahaʻa.
3.Industrial Power Supplies: I nā mea hoʻohuli o ka lā a me nā grids akamai, hiki i ka substrate 12-inihi ke kū i nā voltage kiʻekiʻe me ka hoʻemi ʻana i ka nalowale o ka ikehu.
4. Consumer Electronics: Hiki i nā loina wikiwiki a me nā lako mana kikowaena data ke hoʻohana i nā substrates 12-inch SiC no ka hoʻokō ʻana i ka nui compact a me ka ʻoi aku ka maikaʻi.
Nā lawelawe a XKH
Hoʻolaha mākou i nā lawelawe hoʻoponopono maʻamau no nā substrates 12-inch SiC (12-inch silicon carbide substrates), me:
1. Dicing & Polishing: Haʻahaʻa-hōʻino, kiʻekiʻe-flatness substrate kaʻina hana i kūpono i nā koi o ka mea kūʻai aku, e hōʻoiaʻiʻo ana i ka hana paʻa.
2. Kākoʻo Epitaxial Growth: ʻO nā lawelawe wafer epitaxial kiʻekiʻe e hoʻolalelale i ka hana chip.
3. Hoʻopiʻi liʻiliʻi-Batch Prototyping: Kākoʻo i ka hōʻoia R&D no nā keʻena noiʻi a me nā ʻoihana, e hoʻopōkole i nā pōʻai hoʻomohala.
4. Kūkākūkā Kūkākūkā: Nā hopena hope loa mai ke koho ʻana i nā mea a hiki i ka hoʻoponopono ʻana i ka loiloi, e kōkua ana i nā mea kūʻai aku e lanakila i nā pilikia hoʻoponopono SiC.
Inā no ka hana nui a i ʻole ka hana maʻamau, ʻo kā mākou 12-inch SiC substrate lawelawe e kūlike me kāu mau pono papahana, e hoʻoikaika ana i ka holomua ʻenehana.


