SiC substrate P-type 4H/6H-P 3C-N 4 iniha me ka mānoanoa o 350um Papa hana Dummy grade

ʻO ka wehewehe pōkole:

ʻO ka P-type 4H/6H-P 3C-N 4-inch SiC substrate, me ka mānoanoa o 350 μm, he mea semiconductor hana kiʻekiʻe i hoʻohana nui ʻia i ka hana ʻana i nā mea uila. Ua ʻike ʻia no kāna conductivity thermal kūikawā, ka uila hoʻohaʻahaʻa kiʻekiʻe, a me ke kūpaʻa ʻana i nā wela wela a me nā wahi corrosive, kūpono kēia substrate no nā noi uila uila. Hoʻohana ʻia ka substrate-grade substrate i ka hana nui, e hōʻoia ana i ka mana o ka maikaʻi a me ka hilinaʻi kiʻekiʻe i nā mea uila kiʻekiʻe. I kēia manawa, hoʻohana nui ʻia ka substrate dummy-grade no ka hoʻopau ʻana i ke kaʻina hana, calibration mea hana, a me ka prototyping. ʻO nā waiwai kiʻekiʻe o SiC he koho maikaʻi loa ia no nā mea hana e hana ana i nā kaiapuni kiʻekiʻe, kiʻekiʻe-volt, a me nā alapine kiʻekiʻe, me nā mea mana a me nā ʻōnaehana RF.

E hoʻouna i ka leka uila iā mākou

Huahana Huahana

4 ʻīniha SiC substrate P-type 4H/6H-P 3C-N papa kuhikuhi

4 iniha ke anawaena SilikaʻO ka pāpaʻi Carbide (SiC). Hōʻike

Papa			ʻO Zero MPD Production Papa (Z Papa)	Hana maʻamau Papa (P Papa)	Papa Dummy (D Papa)
Anawaena			99.5 mm~100.0 mm
mānoanoa			350 μm ± 25 μm
Kūlana Wafer			Koi aku: 2.0°-4.0° i ka [112(-)0] ± 0.5° no 4H/6H-P, On axis:〈111〉± 0.5° no 3C-N
Micropipe Density			0 knm-2
Kū'ē	p-ʻano 4H/6H-P		≤0.1 Ωꞏcm		≤0.3 Ωꞏcm
	n-ʻano 3C-N		≤0.8 mΩꞏcm		≤1 m Ωꞏcm
Kūlana Pāha mua		4H/6H-P	- {1010} ± 5.0°
		3C-N	- {110} ± 5.0°
Ka lōʻihi pālahalaha			32.5 mm ± 2.0 mm
Ka lōʻihi pālahalaha lua			18.0 mm ± 2.0 mm
Kūlana Pāpā lua			ʻO ke alo silika i luna: 90° CW. mai Prime flat±5.0°
Hoʻokuʻu Edge			3 mm		6 mm
LTV/TTV/Bow/Warp			≤2.5 μm/≤5 μm/≤15 μm/≤30 μm		≤10 μm/≤15 μm/≤25 μm/≤40 μm
ʻoʻoleʻa			Polani Ra≤1 nm
			CMP Ra≤0.2 nm		Ra≤0.5 nm
Nā Māwae ʻO Edge Ma ka Māmā ʻO ke Kiʻekiʻe			ʻAʻohe		Huina lōʻihi ≤ 10 mm, hoʻokahi lōʻihi≤2 mm
Nā Papa Hex Ma ka Māmā Kiʻekiʻe			ʻĀpana hui ≤0.05%		ʻĀpana hui ≤0.1%
Nā ʻāpana Polytype Ma ka Māmā Kiʻekiʻe			ʻAʻohe		ʻĀpana huila≤3%
Hoʻokomo ʻia ʻo Carbon Visual			ʻĀpana hui ≤0.05%		ʻĀpana hui ≤3%
ʻO ka ʻili o ka ʻili silikoni e ka māmā ikaika loa			ʻAʻohe		Hoʻohui lōʻihi≤1×wafer anawaena
Kiʻekiʻe ʻo Edge Chips e ka māmā ikaika			ʻAʻohe ʻae ʻia ≥0.2mm laula a me ka hohonu		5 ʻae ʻia, ≤1 mm kēlā me kēia
ʻO ka hoʻohaumia ʻana o ka ʻili Silicon e ka ikaika kiʻekiʻe			ʻAʻohe
Hoʻopili ʻia			ʻO ka pahu wafer nui a i ʻole ka pahu wafer hoʻokahi

Nā memo:

※E pili ana nā palena hemahema i ka ʻili wafer holoʻokoʻa koe wale nō ka wahi i kāpae ʻia. # Pono e nānā ʻia nā ʻōpala ma ka maka Si wale nō.

ʻO ka P-type 4H/6H-P 3C-N 4-inch SiC substrate me ka mānoanoa o 350 μm ua hoʻohana nui ʻia i ka hana uila a me ka hana mana. Me ka conductivity thermal maikaʻi loa, ka uila haʻihaʻi kiʻekiʻe, a me ke kūpaʻa ikaika i nā kaiapuni koʻikoʻi, kūpono kēia substrate no nā uila uila hana kiʻekiʻe e like me nā hoʻololi kiʻekiʻe-voltage, inverters, a me nā polokalamu RF. Hoʻohana ʻia nā substrates i hana ʻia i ka hana nui, e hōʻoiaʻiʻo ana i ka hana pono, kiʻekiʻe kiʻekiʻe, ka mea koʻikoʻi no ka uila uila a me nā noi kiʻekiʻe. ʻO nā substrates Dummy-grade, ma ka ʻaoʻao ʻē aʻe, hoʻohana nui ʻia no ka calibration kaʻina, ka hoʻāʻo ʻana i nā lako, a me ka hoʻomohala prototype, e kōkua ana i ka mālama ʻana i ka mana maikaʻi a me ke kaʻina hana i ka hana semiconductor.

Hōʻike ʻO nā mea maikaʻi o N-type SiC composite substrates

Kiʻekiʻe Thermal Conductivity: ʻO ka hoʻoheheʻe wela maikaʻi e hana i ka substrate kūpono no nā noi kiʻekiʻe-mehana a me nā mana kiʻekiʻe.
Kiʻekiʻe Haʻahaʻa Voltage: Kākoʻo i ka hana kiʻekiʻe-voltage, e hōʻoiaʻiʻo ana i ka hilinaʻi i nā uila uila a me nā mea RF.
Kū'ē i nā Kaiapuni Paʻakikī: Paʻa i nā kūlana koʻikoʻi e like me nā wela kiʻekiʻe a me nā wahi corrosive, e hōʻoia ana i ka hana lōʻihi.
Hanana-Papa pololei: E hōʻoia i ka hana kiʻekiʻe a hilinaʻi i ka hana nui, kūpono no ka mana kiʻekiʻe a me nā noi RF.
Papa Dummy no ka hoao ana: Hiki i ka hoʻoponopono ʻana i ke kaʻina hana pololei, ka hoʻāʻo ʻana i nā mea hana, a me ka prototyping me ka ʻole o ka hoʻohaumia ʻana i nā wafers hana.

ʻO ka holoʻokoʻa, hāʻawi ka P-type 4H/6H-P 3C-N 4-inch SiC substrate me ka mānoanoa o 350 μm i nā pono nui no nā noi uila kiʻekiʻe. ʻO kāna conductivity thermal kiʻekiʻe a me ka puʻupuʻu haʻihaʻi he mea kūpono ia no nā kaiapuni kiʻekiʻe a me ka wela kiʻekiʻe, ʻoiai ʻo kona kūpaʻa ʻana i nā kūlana paʻakikī e hōʻoia i ka paʻa a me ka hilinaʻi. ʻO ka substrate-papa hana e hōʻoia i ka hana pololei a paʻa i ka hana nui o ka uila uila a me nā mea RF. I kēia manawa, pono ka substrate dummy-grade no ka calibration kaʻina hana, ka hoʻāʻo ʻana i nā mea hana, a me ka prototyping, ke kākoʻo ʻana i ka mana maikaʻi a me ke kūpaʻa i ka hana semiconductor. Hana kēia mau hiʻohiʻona i nā substrate SiC i mea maʻalahi no nā noi holomua.